The practice of reverse engineering is present throughout many different industries. In general, reverse engineering involves taking an object apart in order to copy and/or improve the object. Reverse engineering has gained widespread use in the computer industry, for both hardware and software applications.
The problem with reverse engineering practices is that companies invest a large amount of resources into research and development efforts to come up with new products, only to have a competitor prey on those efforts by copying the products using reverse engineering. Thus, reverse engineering practices put innovative companies at a competitive disadvantage.
To impede reverse engineering efforts, companies look to employ product designs that cannot be easily copied by others. This tactic is referred to as “anti-reverse engineering.” Anti-reverse engineering practices are described, for example, in U.S. Pat. No. 6,614,080 issued to Vajana et al., entitled “Mask Programmed ROM Inviolable By Reverse Engineering Inspections and Method of Fabrication” (hereinafter “Vajana '080”). Vajana '080 describes a method to provide false interconnection contacts in a read only memory (ROM) device to make reverse engineering more difficult. See also, U.S. Pat. No. 6,528,885 issued to Vajana et al., entitled “Anti-Deciphering Contacts” (hereinafter “Vajana '885”) wherein a plurality of false contacts and/or false interconnections are provided, i.e., in a flash memory cell, to mislead people trying to copy the design.
There are notable limitations/drawbacks associated with the anti-reverse engineering approaches described in Vajana '080 and Vajana '885. For example, the techniques described therein are not generally applicable to non-memory or random logic circuits. Further, these techniques involve true interconnection contacts in the device by a two step process. For example, in Vajana '080, a “lower part” of a contact in an active area is first formed, followed by a later formation of an “upper part” of the contact in the same active area. Creating contacts in this manner requires that the “lower” and “upper” parts of the contact are perfectly aligned with one another, otherwise the contact resistance can be unacceptably high. Further, these techniques involve multiple steps to form true interconnection contacts and false interconnection contacts on the same device. See, for example, in Vajana '885, wherein false contacts are first masked, etched and the etch removed before a similar masking and etching procedure is carried out to form true contacts. This is a time intensive process, which can increase production times and decrease output, and further requires precise alignment through various different masking and etching steps.
U.S. Pat. No. 6,284,627 issued to Ramm et al., entitled “Method for Wiring Semi-conductor Components in Order to Prevent Product Piracy and Manipulation, Semi-conductors Component Made According to This Method and Use of Said Semi-conductor Component in a Chip Card,” describes a method of fabricating a metallized circuit structure for preventing product piracy and product manipulation. For example, in a number of steps, a semiconductor component is formed within a substrate. The component substrate can then be joined by its front surface to a handling substrate. Electrical contacts are formed to the semiconductor component through the component substrate. Namely, the metallizations are built on the backside of the component substrate in order to avoid front side reverse engineering. The disadvantage of this method is that the process to fabricate the component substrate metallization is not a conventional process (i.e., it only applies to a silicon-on-insulator (SOI) substrate). Further, a more serious problem is that reverse engineering can still be performed on the backside of the chip.
Therefore, while teachings do exist for making integrated circuits that are resistant to unauthorized duplication through reverse engineering, they are limited in application and are complex and difficult to implement. As such, improved anti-reverse engineering techniques would be desirable.